A. Technical Field
The present invention relates to data processing systems, and more particularly, to systems and methods of managing power and reducing power consumption in digital logic circuits.
B. Background of the Invention
Power dissipation in semiconductor devices mainly consists of static power losses primarily caused by current leakage across the semiconductor P-N junction and oxide layers of transistors during the non-conducting state of the device, and dynamic power consumption caused by devices switching on and off.
At small process technology nodes, leakage (FIG. 1) may become the dominant source of power loss, greatly exceeding dynamic power consumption. As process technologies scale to even smaller nodes, power loss due to wasteful leakage increases exponentially. Therefore, reducing power dissipation caused by leakage becomes an increasingly important goal in designing systems-on-chip.
What is needed are systems and methods to overcome the above-described limitations.